Improved gate signal generation scheme of auxiliary IGBT switches for VDC/2-retained 2τ - Delayed overvoltage suppression method
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Author list: Tongkhundam G., Konghirun M.
Publisher: Hindawi
Publication year: 2008
Start page: 429
End page: 433
Number of pages: 5
ISBN: 9781424417186
ISSN: 0146-9428
eISSN: 1745-4557
Languages: English-Great Britain (EN-GB)
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Abstract
The high fast voltage rise (dv/dt) in PWM inverter waveforms cause the over voltage at the motor terminals when using long cables and the repeated overvoltage results in serious damage to the motor insulation and eventually to reduce motor life. The typical passive filter to resolve this problem may be difficult to design for varying cable lengths. In this paper, the half DC-link inverter with improved auxiliary PWM generation is proposed to overcome the disadvantages of using passive filters. The correct the PWM duty cycle at motor terminals is also obtained at motor terminals. This is important to obtain the correct fundamental voltage at motor terminal, especially in low voltage operation (or torque boost region). Simulation and experimental results are shown to validate some of theoretical concept proposed. ฉ2008 IEEE.
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