Crosstalk minimization in VLSI design using signal transition avoidance

Conference proceedings article


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Author listTerapasirdsin A., Wattanapongsakorn N.

PublisherHindawi

Publication year2010

Start page911

End page915

Number of pages5

ISBN9781424470105

ISSN0146-9428

eISSN1745-4557

URLhttps://www.scopus.com/inward/record.uri?eid=2-s2.0-78651246520&doi=10.1109%2fISCIT.2010.5665117&partnerID=40&md5=87ec07321479980294e644bad6deecf3

LanguagesEnglish-Great Britain (EN-GB)


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Abstract

Crosstalk appears in various electrical circuits and chip design. This is due to stretches of overlapping wires that produce parasitic coupling between adjacent signal lines. In VLSI design, crosstalk creates a lot of problems. Crosstalk minimization problem is NP complete. This research is to find the solution with minimum crosstalk by using signal transition avoidance technique. We use simulated annealing algorithm to search for the optimal layout pattern. Different generation sequences of a graph give diverse alternatives for horizontal constraint graph of a VLSI channel. The energy function can be designed to take care of crosstalk in the channel. The optimization result, gives the routing solution with minimum crosstalk and minimal total energy. We reduce total energy through capacitance by rearranging wire signal transition. The crosstalk noise model is a proposed concept of effective signal transition consideration. The proposed technique is developed based on a decreasing coupling technique exhibiting a total energy of 6.9% as compared to average energy of all possible patterns. In addition, the result of optimal pattern is 24.4% less than cost of the original layout pattern. ฉ2010 IEEE.


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Last updated on 2023-26-09 at 07:35